A series of questions are asked regarding logic gates and cascaded inverters: 1) If a HIGH is applied to point A in a figure of cascaded inverters, the logic levels at points B through F would be LOW, HIGH, LOW, HIGH, LOW, respectively. 2) Applying a waveform to point A would result in inverted waveforms at subsequent points B through F. 3) The rectangular symbol for a 4-input AND gate is requested to be drawn.

1. 2. A network of cascaded inverters is shown in Figure 3-75. If a HIGH is applied to point A,
determine the logic levels at points B through F. FIGURE 3-75 3. If the waveform in Figure 3-74
is applied to point A in Figure 3-75, determine the waveforms at points B through F. The AND
Gate 4. Draw the rectangular outline symbol for a 4-input AND gate. 5. Determine the output, X,
for a 2 -input AND gate with the input waveforms shown in Figure 3-76. Show the proper
relationship of output to inputs with a timing diagram. 7. The input waveforms applied to a 3-
input AND gate are as indicated in Figure 3-78. Show the output waveform in proper relation to
the inputs with a timing diagram.