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ACEEE Int. J. on Electrical and Power Engineering, Vol. 01, No. 03, Dec 2010




     PI, PID and Fuzzy logic controller for Reactive
           Power and Harmonic Compensation
                                      Karuppanan P and Kamala Kanta Mahapatra
                           Dept of ECE, National Institute of Technology-Rourkela, India-769008
                                  Email: karuppanan1982@gmail.com, kmaha2@rediffmail.com



Abstract— This article describes the proportional integral            under both steady state and transient conditions. The
(PI), proportional integral derivative (PID) and fuzzy logic          operation of APLC is demonstrated in details. The methods
controller (FLC) based three phase shunt active power line            of extracting reference current(s) and dc capacitor voltage
conditioners (APLC) for the power-quality improvement such            is also presented. The results are also presented that
as reactive power and harmonic current compensation                   validates the concept and a comparative assessment is
generated due to nonlinear loads. PI, PID controller requires
precise linear mathematical model and FLC needs linguistic
                                                                      done.
description of the system. The controller is capable of
controlling dc capacitor voltage and generating reference                                      II. DESIGN OF SHUNT APLC
source currents. Hysteresis current controller is used for
                                                                            The active power line conditioner comprises of six
current control in PWM voltage source inverter. Extensive
simulation studies under transient and steady states are              power transistors six power diodes, a dc capacitor , three
conducted, the simulation result analysis reveal that the             filter inductor. Reduction of current harmonics is achieved
APLC performs perfectly in conjunction with PI, PID and               by injecting equal but opposite current harmonic
FLC. A comparative assessment of the three different                  components at the point of common coupling (PCC), this
controllers is brought out.                                           facilitates improving the power quality on the connected
                                                                      power system. The APLC additionally supplies the reactive
Index Terms—Proportional Integral (PI) controller,                    current component of the load current. The block diagram
Proportional Integral Derivative (PID) controller Fuzzy logic         of APLC is shown in fig 1. The output voltage of the
controller (FLC), Hysteresis current controller (HCC), Active
                                                                      inverter is controlled with respect to the voltage at the point
power line conditioners (APLC).
                                                                      of common coupling. The design of the DC side capacitor
                                                                      is based on the principle of instantaneous power flow. The
                     I. INTRODUCTION
                                                                      selection of C DC can be governed by reducing the voltage
     AC power supply feeds different kind of linear and               ripple.
non-linear loads in utilities and industrial applications. The        The instantaneous current can be written as [4]
non-linear loads produce harmonics. The harmonic and                           is (t ) = iL (t ) − ic (t )                (1)
reactive power cause poor power factor and distort the
                                                                      Source voltage is given by
supply voltage at the common coupling point or customer
                                                                                vs (t ) = Vm sin ωt                        ( 2)
service point [1-3]. Passive L-C filters are used to
compensate the lagging power factor of the reactive load,             If a nonlinear load is applied, then the load current will
but there are drawbacks such as resonance, large size,                have a fundamental component and harmonic components,
weight, etc., the alternative solution, are an active power           which can be represented as
                                                                                  ∞
line conditioner (APLC) that provides an effective solution
for harmonics elimination and reactive power                          iL (t ) =   ∑I
                                                                                  n =1
                                                                                         n   sin( nωt + Φ n )
compensation. The controller is the most important part of
the APLC and currently lot of research is being conducted                                       ⎛ ∞                        ⎞
in this area. PI and PID controllers have been used to                     = I1 sin(ωt + Φ1 ) + ⎜
                                                                                                ⎜          ∑
                                                                                                      I n sin( nωt + Φ n ) ⎟
                                                                                                                           ⎟
                                                                                                                                               (3)
extract the fundamental component of the load current(s)                                        ⎝ n=2                      ⎠
and simultaneously control dc capacitor voltage of the                The instantaneous load power can be given as
shunt APLC [1-2]. Recently, fuzzy logic controllers (FLC)                   p L (t ) = is (t ) * vs (t )
are used in power electronic system [3-5] as it can handle                          = Vm sin 2 ωt * cos φ1 + Vm I1 sin ωt * cos ωt * sin φ1
nonlinearity, and it is more robust than conventional
nonlinear controllers.                                                                                    ⎛ ∞                        ⎞
     This paper explores the potential and feasibility of PI,
                                                                                        + Vm sin ωt * ⎜
                                                                                                          ⎜∑     I n sin(nωt + Φ n ) ⎟
                                                                                                                                     ⎟
PID and FLC schemes that are suitable for extracting the                                                  ⎝ n=2                      ⎠
fundamental component of the load current(s) and                                    = p f (t ) + pr (t ) + p h (t )                      (4)
simultaneously controlling dc capacitor voltage of the                From the equation the real (fundamental) power drawn by
shunt APLC. The performance of APLC with different                    the load is
controllers are evaluated through computer simulations
                                                                 54
© 2010 ACEEE
DOI: 01.IJEPE.01.03.134
ACEEE Int. J. on Electrical and Power Engineering, Vol. 01, No. 03, Dec 2010




                 3-Phase Source             isa,isb, isc                                                            Non-Linear Load
                                        A                                                      ILa,iLb, iLc         A
                                        B                                                                                                     RL
                                                                                                                    B
                                        C                                                                           C                         LL
                                                                                     Ica,icb, icc
                        vsa,vsb, vsc              Rs,Ls
                                                                                          Rc,Lc               Active Power Filter

                                                                                          A
                                                                                          B                                             VDC
                                                                                          C
                                                                                          G          PWM-VSI inverter
                       g1 g2 g3 g4 g5 g6
                                                                        Active Power Controller
                                                           isa*                                                Proportional Integral
                           Hysteresis Current              isb*    Reference current                                   (Or)                        VDC
                              Controller                              Generator                                Proportional-Integral
                                                                                                                    Derivative
                                                           isc*                                                        (Or)
                                                                                                              Fuzzy Logic Controller           VDC ref
                        isc       isb       isa                   vsc         vsb        vsa
                      Fig 1 Block diagram of the Proposed APLC based on Fuzzy logic controller or Proportional-Integral controller


p f (t ) = Vm I1 sin 2 ωt * cos φ1 = vs (t ) * is (t )                  (5)
                                                                                                                      PID-Controller
From this equation the source current supplied by the                                                                   PI-Controller
source, after compensation is
                                                                                                                                 Gain
                    p f (t )                                                                    Vdc,ref
          is (t ) =          = I1 cosφ1 sin ωt = I sm sin ωt (6)
                    vs (t )                                                                                        Integrator     Gain
                                                                                                                                                   Saturation
where,
           I sm = I1 cos φ1                                  (7)                                                   Derivative      Gain
                                                                                           Vdc
The total peak current supplied by the source is
                                                                                                  LPF                                                           isa*
          I sp = I sm + I sl                                  (8)                                             Vs        Gain
                                                                                                                                                         X
If the active filter provides the total reactive and harmonic                                                                                                   isb*
power, then is(t) will be in phase with the utility voltage                                                   Vs          Gain
                                                                                                                                                         X
and purely sinusoidal. At this time, the active filter must                                                                                                     isc*
provide the following compensation current:                                                                   Vs                                         X
                                                                                                                          Gain
          ic (t ) = iL (t ) − is (t )                    (9)
The desired source currents, after compensation, can be                                             Fig 2 PI and PID- controller for reference current generator
given
                                                                                         Its transfer function can be represented as
          isa * = I sp sin ωt                           (10)
                                                                                                        K
           isb * = I sp sin(ωt − 1200 )                                 (11)              H ( s) = K P + I                                        (13)
                                                                                                         s
           isc * = I sp sin(ωt + 1200 )                                 (12)             where, K P is the proportional constant that determines the
                                                                                         dynamic response of the DC-bus voltage control and K I is
Where I sp = I sm + I sl          is the amplitude of the desired
                                                                                         the integration constant that determines it’s settling time. PI
source current.                                                                          controller to eliminate the steady state error in dc voltage.
A. Proportional Integral (PI) Controller:                                                The proportional gain [ K P =0.3] and integral gain [ K I =9]
     Figure 2 shows the block diagram of the proposed PI                                 are set such way that Vdc across capacitor is nearly equal to
control scheme of an APLC. The DC side capacitor voltage                                 the reference value of Vdc .
is sensed and then compared with a reference value. The
obtained error e = Vdc ,ref − Vdc at the nth sampling instant is                         B. Proportional Integral Derivative (PID) Controller:
used as input for PI controller. PI controller used to control                                The PID controller works on the principle of the PI
the DC-bus voltage.                                                                      controller(refer fig 2), its control gain is a linear
                                                                                         combination of the error itself representing the present, the
                                                                                         integral of the error representing the past and the derivative
                                                                                         of the error representing the future/trend.


                                                                                    55
© 2010 ACEEE
DOI: 01.IJEPE.01.03.134
ACEEE Int. J. on Electrical and Power Engineering, Vol. 01, No. 03, Dec 2010



                KI                                                                     D. Hysteresis Band Current Control:
 H ( s) = K P +    + K D ( s)                (14)
                 s                                                                                                   emax +Vdc/2
The controller is tuned with proper gain parameters                                      iactual(t)                           vout
                                                                                                               e (t)                             L
[ K P =0.7, K I =23, K D =0.01].                                                                                                                                        iout

C. Fuzzy Logic Controller (FLC):
     Fuzzy logic control is derived from fuzzy set theory,                                                               emin -Vdc/2
                                                                                                            iref (t)
the transition between membership and non-membership
can be gradual. Therefore, boundaries of fuzzy sets can be
vague and ambiguous, making it useful for approximate                                                 Fig 4 Block diagram of hysteresis current controller
systems [4-5]. In fig.1 shows the APLC compensation
system with fuzzy control scheme. In order to implement                                    A hysteresis current controller (Fig. 4) is implemented
the control algorithm of a shunt active power line                                     to control the switches in the inverter [6-8] to control the
conditioner in a closed loop, the dc capacitor voltage                                 current within the inverter.
VDC is sensed and then compared with the reference                                                        III. SIMULATION RESULT AND ANALYSIS
value VDC , ref .
                                                                                            The results of the proposed PI, PID and fuzzy logic
                                                                                       controlled shunt APLC is investigated using SIMULINK/
                                            Rule Base
                                                                                       MATLAB. The system parameters values are; source
                                                                                       voltage (Vs) is 230 Vrms, System frequency (f) is 50 Hz,
                   e(n)                                                                Source impedance of RS, LS is 1 Ω; 0.1mH respectively,
Vdc,ref                                 Rule Evaluator                                 Filter impedance of Rc, Lc is 1 Ω; 2.7 mH, Load impedance
          +        Fuzzification
                                          (Decision            Defuzzification
                                                                                       of RL, LL of diode rectifier RL load in Steady state: 20 Ω;
          -                                making)
                   ce(n)                                                               200 mH and Transient: 10 Ω; 100 mH respectively, DC
   Vdc                                                                                 link capacitance (CDC) is 1600 μF, Reference Voltage
                                                                                       (VDC) is 400 V and Power devices used are IGBT/Diode.
                                            Data Base
                                                                                       Case 1: Proportional Integral controller:
                           Fig 3 Fuzzy logic controller
                                                                                            PI-controlled APLC system comprises of a three-phase
                             Table 1 Rule base table                                   source, a nonlinear load (six pulse diode rectifier bridge
                                                                                       feeding an RL load) and a PWM voltage source inverter
   ce(n)      NB       NM       NS       ZE      PS       PM        PB
  e(n)
                                                                                       with a dc capacitor input. The simulation time T=0 to
                                                                                       T=0.5s with diode rectifier and R L load parameter values
   NB         NB       NB       NB       NB     NM        NS        ZE
                                                                                       of 20 ohms and 200 mH respectively. The source current
  NM          NB       NB       NB      NM       NS       ZE         PS                after compensation is presented in fig. 5 (a) that indicates
   NS         NB       NB       MN       NS      ZE       PS        PM                 the current becomes sinusoidal. The load current is shown
   ZE         NB       NM       NS       ZE      PS       PM        PB                 in (b) for a particular phase (phase a). The actual reference
   PS         NM       NS       ZE       PS      PM       PB        PB                 currents for phase (a) are shown in fig. 5(c). This wave is
                                                                                       obtained from our proposed PI controller. The APLC
   PM         NS       ZE          PS    PM      PB       PB        PB
                                                                                       supplies the compensating current that is shown in Fig.
   PB         ZE       PS       PM       PB      PB       PB        PB                 5(d). The current after compensation is as shown in (a)
                                                                                       which would have taken a shape as shown in (b) without
         In case of a fuzzy logic control scheme, the error
 (                   )
  e = VDC , ref − VDC and integration of error signal
                                                                                       APLC. It is clearly visible that this waveform is sinusoidal
                                                                                       with some high frequency ripples. We have additionally
 (∫ e) are used as inputs for fuzzy processing shown in fig                            achieved power factor correction as shown in Fig. 5(e),
                                                                                       phase (a) voltage and current are in phase. The time
3. The output of the fuzzy controller after a limit is                                 domain response of the PI controller is shown in Fig. 5(f)
considered as the magnitude of peak reference current I max .                          that clearly indicates the controller output settles after a
                                                                                       few cycles.
The switching signals for the PWM inverter are obtained                                           100
                                                                                                                                                                                      Isa




by comparing the actual source currents (isa , isb , isc ) with
                                                                                                   80

                                                                                                   60

                                                                                                   40




                                                                                           (a)
                                                                                                   20

                                                                                                      0

                                                                                                  -20




                                                 (isa *, isb *, isc *) in
                                                                                                  -40

                                                                                                  -60

                                                                                                  -80




the reference current templates                                             the
                                                                                                     0        0.05     0.1   0.15   0.2   0.25       0.3   0.35   0.4          0.45         0.5




                                                                                                   50
                                                                                                                                                                                        iLa
                                                                                                   40

                                                                                                   30




                                                                                           (b)
                                                                                                   20




hysteresis current controller. The output pulses are then
                                                                                                   10

                                                                                                      0

                                                                                                  -10

                                                                                                  -20




given to the switching devices of the PWM converter.The
                                                                                                  -30

                                                                                                  -40

                                                                                                  -50
                                                                                                     0        0.05     0.1   0.15   0.2   0.25       0.3   0.35   0.4          0.45         0.5




rules used in this paper are shown in table 1.
                                                                                                   80
                                                                                                                                                                                      Isaref
                                                                                                   60


                                                                                                   40




                                                                                           (c)     20




                                                                                                  -20
                                                                                                      0




                                                                                                  -40


                                                                                                  -60


                                                                                                  -80
                                                                                                     0        0.05     0.1   0.15   0.2   0.25       0.3   0.35   0.4          0.45         0.5




                                                                                  56
© 2010 ACEEE
DOI: 01.IJEPE.01.03.134
ACEEE Int. J. on Electrical and Power Engineering, Vol. 01, No. 03, Dec 2010



                                                                                                                                                                                                                                         The real and reactive power measured using PID
                                               80
                                                                                                                                                                                                                   Ica
                                               60


                                               40


                                               20




         (d)                                -20


                                            -40


                                            -60
                                                0



                                                                                                                                                                                                                                     controller, shown in fig 9.
                                                                                                                                                                                                                                       9000
                                            -80
                                               0               0.05              0.1              0.15               0.2                0.25             0.3              0.35              0.4            0.45          0.5
                                                                                                                                                                                                                                       8000

                                                                                                                                                                                                                                       7000
                                           200                                                                                                                                                                    Isa
                                                                                                                                                                                                                                       6000
                                                                                                                                                                                                                                                                                                                                                                                                                        Real Power
                                                                                                                                                                                                                  Vsa
                                           150                                                                                                                                                                                                                                                                                                                                                                          Reactive Power
                                                                                                                                                                                                                                       5000
                                           100




         (e)
                                               50                                                                                                                                                                                      4000

                                                0                                                                                                                                                                                      3000

                                            -50                                                                                                                                                                                        2000
                                           -100
                                                                                                                                                                                                                                       1000
                                           -150
                                                                                                                                                                                                                                          0
                                           -200
                                                0              0.05              0.1              0.15               0.2                0.25             0.3              0.35              0.4            0.45          0.5           -1000
                                                                                                                                                                                                                                            0                                                 0.1          0.2              0.3              0.4             0.5              0.6             0.7               0.8              0.9               1

                                                                                                                                                                                                                                                                                                                                                                                                                                                        
                                                                                                                                                                                                                                       Fig 9 Active and Reactive power at diode rectifier RL load under the
                                           700
                                                                                                                                                                                                                  Vdc
                                           600


                                           500




         (f)
                                           400


                                           300


                                           200


                                           100
                                                                                                                                                                                                                                               steady state condition (P=7.34 KW, Q=0.034 KW)
                                                0


                                           -100




                                                                                                                                                                                                                                         Total Harmonic distortion measurement (THD) of the
                                               0               0.05              0.1              0.15               0.2                0.25             0.3              0.35              0.4            0.45          0.5




  Fig.5 Simulation results for PI-controlled three-phase APLC under the
                                                                                                                                                                                                                                     APLC in the transient condition by proportional-integral
 steady state condition (a) Source current after APLC, (b) Load currents,
     (c)Reference currents by the Proportional-integral algorithm, (d)                                                                                                                                                               derivative controller, shown in fig 10.
 Compensation current by APLC, (e) source voltage per current for unity
                                                                                                                                                                                                                                                                                              20




                                                                                                                                                                                                                                                         Mg it d b s do " a eP a "-P r mt r
                                                                                                                                                                                                                                                                                    aa ee
                                                                                                                                                                                                                                                                                              18

                                                                                                                                                                                                                                                                                              16



                power factor and (f) DC capacitor voltage                                                                                                                                                                                                                                     14




                                                                                                                                                                                                                                                          a nu e a e n Bs e k
                                                                                                                                                                                                                                              (a)
                                                                                                                                                                                                                                                                                              12

                                                                                                                                                                                                                                                                                              10

                                                                                                                                                                                                                                                                                               8




     The active power P and reactive power Q associated                                                                                                                                                                                                                                        6

                                                                                                                                                                                                                                                                                               4

                                                                                                                                                                                                                                                                                               2




with a periodic voltage-current pair that can contain
                                                                                                                                                                                                                                                                                               0
                                                                                                                                                                                                                                                                                                    0            2                4                6          8               10             12            14               16                18
                                                                                                                                                                                                                                                                                                                                                                   Order of Harmonic



                                                                                                                                                                                                                                                                                              30




harmonics. P and Q are calculated by averaging the




                                                                                                                                                                                                                                                         Mg it d b s do " a e e k -Pr mt r
                                                                                                                                                                                                                                                          a nu e a e n Bs Pa " aa e     e
                                                                                                                                                                                                                                                                                              25



                                                                                                                                                                                                                                                                                              20




voltage-current product with a running average window                                                                                                                                                                                         (b)                                             15



                                                                                                                                                                                                                                                                                              10




over one cycle of the fundamental frequency (refer fig 6).                                                                                                                                                                                                                                     5



                                                                                                                                                                                                                                                                                               0
                                                                                                                                                                                                                                                                                                    0            2                4                6          8               10
                                                                                                                                                                                                                                                                                                                                                                   Order of Harmonic
                                                                                                                                                                                                                                                                                                                                                                                             12            14               16                18




                                                                      t
                                             1
                                                                      ∫ V (ωt ) × I (ωt )dt
                                                                                                                                                                                                                                      Fig 10 PID-controlled under the Transient condition (a) FFT analys of
                                          P=                                                                                                                                                       (15)                                      Source current without APLC(THD=24.96%) (b) with
                                             T
                                                                  t −T                                                                                                                                                                                       APLC(THD=2.96%).
                                                                     t
                                                         1
                                          Q=
                                                         T            ∫ v(ωt ) × i(ωt − π / 2)dt                                                                                                   (16)                              Case 3: Fuzzy logic controller:
                                                                  t −T                                                                                                                                                                   Simulation time T=0 to T=0.5s with load of rectifier
                                                                                                                                                                                                                                     with RL parameter values of 20 ohms and 200mH
9000

8000

7000

6000                                                                                                                                                                                              Real Power
5000                                                                                                                                                                                              Reactive Power




                                                                                                                                                                                                                                     respectively in the steady state and the load with R L value
4000

3000

2000

1000




                                                                                                                                                                                                                                     of 10 ohms and 100 mH under transient condition. The
   0

-1000
     0                                    0.1              0 .2                  0.3               0 .4                    0.5                 0 .6               0.7               0 .8             0.9             1




    Fig 6 Active and Reactive power at diode rectifier RL load under the                                                                                                                                                             simulated waveforms are presented in figures 11, 12 and
             steady state condition (P=7.34 KW, Q=0.04 KW)                                                                                                                                                                           13.
                                                                                                                                                                                                                                                 100
                                                                                                                                                                                                                                                                                                                                                                                                                                                   Isa
                                                                                                                                                                                                                                                    80




   Total Harmonic distortion (THD) is measured of the
                                                                                                                                                                                                                                                    60

                                                                                                                                                                                                                                                    40




                                                                                                                                                                                                                                      (a)
                                                                                                                                                                                                                                                    20

                                                                                                                                                                                                                                                     0




APLC in the PI controller, shown in fig 7.
                                                                                                                                                                                                                                                  -20

                                                                                                                                                                                                                                                  -40

                                                                                                                                                                                                                                                  -60

                                                                                                                                                                                                                                                  -80
                                                                                                                                                                                                                                                     0                                              0.05             0.1              0.15             0.2          0.25               0.3          0.35              0.4              0.45                0.5

                                          16
                  M iu b eo"a Pk- amr
                                    a e
                  a t d a dn s e " P e
                                    r t




                                                                                                                                                                                                                                                    50
                                          14
                                                                                                                                                                                                                                                                                                                                                                                                                                                   iLa
                                                                                                                                                                                                                                                    40
                                          12
                                                                                                                                                                                                                                                    30
                            Be a




                                          10                                                                                                                                                                                                        20




    (a)
                                                                                                                                                                                                                                                    10
                                           8




                                                                                                                                                                                                                                      (b)
                                                                                                                                                                                                                                                     0
                   g e s




                                           6
                                                                                                                                                                                                                                                  -10

                                           4                                                                                                                                                                                                      -20
                   n




                                                                                                                                                                                                                                                  -30
                                           2
                                                                                                                                                                                                                                                  -40
                                           0
                                                    0                 2                4                  6                 8                10              12                14             16             18                                   -50
                                                                                                                                                                                                                                                     0                                              0.05             0.1              0.15             0.2          0.25               0.3          0.35              0.4              0.45                0.5
                                                                                                                                 Order of Harmonic



                                          30
                                                                                                                                                                                                                                                    80
                                   a e
                             e a - r tr
                  M iu be n a Pk P m
                  a td ad " s e" a e




                                                                                                                                                                                                                                                                                                                                                                                                                                                   Ica
                                          25
                                                                                                                                                                                                                                                    60
                                          20




    (b)
                                                                                                                                                                                                                                                    40
                   g e s oB




                                          15

                                                                                                                                                                                                                                                    20
                                          10




                                                                                                                                                                                                                                      (c)
                                                                                                                                                                                                                                                     0
                   n




                                           5


                                           0
                                                                                                                                                                                                                                                  -20
                                                    0                 2                4                  6                 8                10              12                14             16             18
                                                                                                                                 Order of Harmonic
                                                                                                                                                                                                                                                  -40


                                                                                                                                                                                                                                                  -60




Fig 7 PI-controlled under the steady state (a) FFT analys of Source current
                                                                                                                                                                                                                                                  -80
                                                                                                                                                                                                                                                     0                                              0.05             0.1              0.15             0.2          0.25               0.3          0.35              0.4              0.45                0.5



                                                                                                                                                                                                                                                  600




      without APLC (THD=25.58%) (b) with APLC(THD=1.98%).
                                                                                                                                                                                                                                                                                                                                                                                                                                                   Vdc
                                                                                                                                                                                                                                                  500


                                                                                                                                                                                                                                                  400


                                                                                                                                                                                                                                                  300




                                                                                                                                                                                                                                      (d)
                                                                                                                                                                                                                                                  200




Case 2: Proportional Integral Derivative controller:                                                                                                                                                                                              100




                                                                                                                                                                                                                                                 -100
                                                                                                                                                                                                                                                     0



                                                                                                                                                                                                                                                     0                                              0.05             0.1              0.15             0.2           0.25              0.3          0.35              0.4              0.45                0.5




     ID controlled simulation waveforms are verified
                                                                                                                                                                                                                                      Fig.11 Simulation results for Fuzzy Logic Controlled 3-phase APLC
similarly PI-controller, PID controller waveform presented                                                                                                                                                                           under the steady state condition (a) Source current after APLC, (b) Load
in figures 8, 9 and 10.                                                                                                                                                                                                                currents, (c) Compensation current by APLC, and (d) DC capacitor
                                                                                                                                                                                                                                                                      voltage
               100
                                                                                                                                                                                                                   Isa
                80

                60

                40




  (a)                                                                                                                                                                                                                                     The summarized DC voltage settling time compared
                20

                      0

                -20

                -40




                                                                                                                                                                                                                                     PI, PID and Fuzzy logic controller, shown in table 2
                -60

                -80

               -100
                   0                                    1000              2000             3000               4000                  5000              6000              7000               8000        9000             10000



                50
                                                                                                                                                                                                                  iLa
                40

                30

                20




                                                                                                                                                                                                                                       Table 2 comparison of PI, PID and FLC for DC voltage settling time
                10




  (b)
                      0

                -1 0

                -2 0

                -3 0

                -4 0

                -5 0
                    0                                   1000              2000             3000               4000                  5000              6000              7000           8000           9000          10000




                80
                                                                                                                                                                                                                  Ica




                                                                                                                                                                                                                                                 Diode                                                                                       VDC settling time in seconds
                60


                40




  (c)
                20




                                                                                                                                                                                                                                                rectifier
                      0


                -20


                -40



                                                                                                                                                                                                                                                                                                                                  PI                                   PID                                 Fuzzy logic
                                                                                                                                                                                                                                                RL load
                -60


                -80
                   0                                    1000              2000             3000               4000                  5000              6000              7000           8000           9000          10000




               700
                                                                                                                                                                                                                  vdc
                                                                                                                                                                                                                                                                                                                                                                                                            controller
                                                                                                                                                                                                                                                                                                                           controller                          controller
               600


               500




  (d)
               400


               300


               200




                                                                                                                                                                                                                                         Steady State                                                                       0.37s                                    0.26s                                        0.22s
               100


                      0


               -100
                   0                                    1000              2000             3000               4000                  5000              6000              7000           8000           9000          10000




   Fig.8 Simulation results for PID controlled 3-phase APLC under the                                                                                                                                                                         Transient                                                                     0.39s                                    0.28s                                        0.23s
 steady state condition (a) Source current after APLC, (b) Load currents,
    (c) Compensation current by APLC, and (d) DC capacitor voltage
                                                                                                                                                                                                                                          The real and reactive power measured using fuzzy
                                                                                                                                                                                                                                     logic controller, shown in fig 12.

                                                                                                                                                                                                                                57
© 2010 ACEEE
DOI: 01.IJEPE.01.03.134
ACEEE Int. J. on Electrical and Power Engineering, Vol. 01, No. 03, Dec 2010


 9000

 8000

 7000
                                                                                                                                                                                                                                                                CONCLUSIONS
 6000
                                                                                                                                                                                                              Real Power



                                                                                                                                                                                                                                            PI, PID and fuzzy logic controllers are implemented for
 5000                                                                                                                                                                                                         Reactive Power
 4000

 3000




                                                                                                                                                                                                                                        three phase shunt active power line conditioner to obtain dc
 2000

 1000

    0




                                                                                                                                                                                                                                        capacitor voltage and the reference currents. This facilitates
 -1000
      0                                                                                           0.1            0.2             0.3           0.4        0.5                 0.6          0.7        0.8          0.9         1




  Fig 12 Active and Reactive power at diode rectifier RL load under the                                                                                                                                                                 to improve the power quality parameters such as reactive
           steady state condition (P=7.33 KW, Q=0.04 KW)                                                                                                                                                                                power and harmonic compensation due to nonlinear load.
    The summarized Real (P) and Reactive (Q) power                                                                                                                                                                                      The performance of a PI, PID and fuzzy logic controlled
calculation compared with PI, PID and Fuzzy logic                                                                                                                                                                                       APLC is verified and compared under steady state and
controller, shown in table 3.                                                                                                                                                                                                           transient in various disciplines. The fuzzy logic controller
                                                                                                                                                                                                                                        reduces ripples in the dc capacitor voltage and needs less
  Table 3 comparison of PI, PID and FLC for Real and Reactive power                                                                                                                                                                     settling time compared to PI and PID-controller. The THD
 Controller                                                                                                      Condition                              Real (P) and Reactive (Q) power                                                 of the source current after compensation is less than 5% in
                                                                                                                                                                  measurement                                                           case of all the controllers, the harmonic limit imposed by
                                                                                                                                                        Without APLC          With APLC                                                 the IEEE-519 standard. Apparently it seems that the fuzzy
          PI                                                                                                    Steady state                             P=3.90 KW            P=7.34 KW
                                                                                                                                                         Q=0.12 KW            Q=0.04 KW
                                                                                                                                                                                                                                        logic controller is an effective candidate for active power
                                                                                                                Transient                                P=4.85 KW            P=7.34 KW                                                 line conditioner to solve power quality issues as this would
                                                                                                                                                         Q=0.16 KW            Q=0.07 KW                                                 also facilitate easy implementation.
     PID                                                                                                        Steady state                             P=3.90 KW            P=7.34 KW
                                                                                                                                                         Q=0.12 KW            Q=0.03 KW
                                                                                                                                                                                                                                                         ACKNOWLEDGEMENTS
                                                                                                                Transient                                P=4.85 KW            P=7.34 KW
                                                                                                                                                         Q=0.16 KW            Q=0.07 KW                                                 The authors would like to acknowledge to Ministry of
Fuzzy logic                                                                                                     Steady state                             P=3.91 KW            P=7.33 KW
                                                                                                                                                         Q=0.13 KW            Q=0.04 KW
                                                                                                                                                                                                                                        Communication and Information Technology, Govt. of
                                                                                                                Transient                                P=4.83 KW            P=7.35 KW                                                 India for the financial support.
                                                                                                                                                         Q=0.17 KW            Q=0.08 KW
                                                                                                                                                                                                                                                                 REFERENCES
     Total Harmonic distortion measurement of the APLC
in the fuzzy logic controller, shown in fig 13.                                                                                                                                                                                         [1] Bimal Abdelmadjid Chaoui, Jean Paul Gaubert, Fateh Krim,
                                                                                              30
                                                                                                                                                                                                                                            Gerard Champenois “PI Controlled Three-phase Shunt
                                                                                    aa e r
                                                       M g itu eb s do " a eP a " -P r m te




                                                                                                                                                                                                                                            Active Power Filter for Power Quality Improvement”-
                                                                                              25




   (a)
                                                        an d ae n Bs ek




                                                                                              20



                                                                                              15
                                                                                                                                                                                                                                            Electric Power Components and Systems, 35:1331–1344,
                                                                                                                                                                                                                                            2007
                                                                                              10



                                                                                                  5



                                                                                                  0
                                                                                                            0              2               4        6         8               10
                                                                                                                                                                  Order of Harmonic
                                                                                                                                                                                      12         14          16          18             [2] Yu Chen and Bo Fu Qionglin Li “Fuzzy Logic Based Auto-
                                                                         30
                                                                                                                                                                                                                                            modulation of Parameters PI Control for Active Power
                                             aa e r
               M g itu eb s do " a eP a " - P r m te




                                                                                                                                                                                                                                            Filter”- World Congress on Intelligent Control and
                                                                         25
                a n d ae n Bs e k




                                                                         20


   (b)                                                                   15
                                                                                                                                                                                                                                            Automation June 25 - 27, 2008
                                                                                                                                                                                                                                        [3] S. Saad, L. Zellouma “Fuzzy logic controller for three-level
                                                                         10



                                                                                              5



                                                                                              0
                                                                                                        0              2               4        6         8               10
                                                                                                                                                              Order of Harmonic
                                                                                                                                                                                      12         14         16           18                 shunt active filter compensating harmonics and reactive
                                                                                                                                                                                                                                            power” Electric Power Systems Research, Elsevier, page no
 Fig 13 Fuzzy logic controlled FFT analys of Source current with APLC                                                                                                                                                                       1337–1341 May-2009
  under the (a) steady state (THD=1.98%) (b) transient (THD=2.98%)
                                                                                                                                                                                                                                        [4] S.K. Jain, P. Agrawal and H.O. Gupta “Fuzzy logic
     The summarized Total harmonic distortion (THD)                                                                                                                                                                                         controlled shunt active power filter for power quality
compared PI, PID and Fuzzy logic controllers, under steady                                                                                                                                                                                  improvement”-IEE proc.electr.power.appl,Vol 149, No.5,
                                                                                                                                                                                                                                            Sept-2002
state and transient conditions, shown in table 4.
                                                                                                                                                                                                                                        [5] V. S. C. Raviraj and P. C. Sen “Comparative Study of
                  Table 4 THD comparison of PI, PID and FLC Techniques                                                                                                                                                                      Proportional–Integral, Sliding Mode, and Fuzzy Logic
                                                                                                                                                                                                                                            Controllers for Power Converters” IEEE Tran Industry Vol
      Diode                                                                                                           Source                                      Source Current(IS) with APLC                                              33, No. 2, March/Appl-1997.
     rectifier                                                                                                     Current(IS)                                                                                                          [6] K. K. Mahapatra, Arindam Ghosh and S.R.Doradla
                                                                                                                                                                  PI                   PID                  Fuzzy logic
     RL load                                                                                                      without APLC
                                                                                                                                                                                                                                            “Simplified model for control design of STATCOM using
 Steady State                                                                                                              25.258%                       1.98%                        1.82%                       1.98%                     Three-Level Inverter”- IEEE Conference vol. 2, pp. 536-539-
                                                                                                                                                                                                                                            1998
   Transient                                                                                                                   24.96%                    2.96%                        2.96%                       2.98%                 [7] Brod D.M, Novotny D.M “Current control of VSI-PWM
                                                                                                                                                                                                                                            Inverter”-IEEE Trans on Industry Appl, Vol.21, pp.562-570-
   The obtained result shows small variation in steady state                                                                                                                                                                                July/Aug. 1985.
                                                                                                                                                                                                                                        [8] Malesani, L., L. Rosetto, G. Spiazzi and A. Zucatto “An ac
and transient conditions. FFT analysis of the active filter                                                                                                                                                                                 power supply with sliding mode control”-IEEE Industry
brings the THD of the source current into compliance with                                                                                                                                                                                   Appl Magazine Vol.2, page(s): 32-38 Sep/Oct 1996
IEEE-519 standards.




                                                                                                                                                                                                                                   58
© 2010 ACEEE
DOI: 01.IJEPE.01.03.134

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PI, PID and Fuzzy logic controller for Reactive Power and Harmonic Compensation

  • 1. ACEEE Int. J. on Electrical and Power Engineering, Vol. 01, No. 03, Dec 2010 PI, PID and Fuzzy logic controller for Reactive Power and Harmonic Compensation Karuppanan P and Kamala Kanta Mahapatra Dept of ECE, National Institute of Technology-Rourkela, India-769008 Email: karuppanan1982@gmail.com, kmaha2@rediffmail.com Abstract— This article describes the proportional integral under both steady state and transient conditions. The (PI), proportional integral derivative (PID) and fuzzy logic operation of APLC is demonstrated in details. The methods controller (FLC) based three phase shunt active power line of extracting reference current(s) and dc capacitor voltage conditioners (APLC) for the power-quality improvement such is also presented. The results are also presented that as reactive power and harmonic current compensation validates the concept and a comparative assessment is generated due to nonlinear loads. PI, PID controller requires precise linear mathematical model and FLC needs linguistic done. description of the system. The controller is capable of controlling dc capacitor voltage and generating reference II. DESIGN OF SHUNT APLC source currents. Hysteresis current controller is used for The active power line conditioner comprises of six current control in PWM voltage source inverter. Extensive simulation studies under transient and steady states are power transistors six power diodes, a dc capacitor , three conducted, the simulation result analysis reveal that the filter inductor. Reduction of current harmonics is achieved APLC performs perfectly in conjunction with PI, PID and by injecting equal but opposite current harmonic FLC. A comparative assessment of the three different components at the point of common coupling (PCC), this controllers is brought out. facilitates improving the power quality on the connected power system. The APLC additionally supplies the reactive Index Terms—Proportional Integral (PI) controller, current component of the load current. The block diagram Proportional Integral Derivative (PID) controller Fuzzy logic of APLC is shown in fig 1. The output voltage of the controller (FLC), Hysteresis current controller (HCC), Active inverter is controlled with respect to the voltage at the point power line conditioners (APLC). of common coupling. The design of the DC side capacitor is based on the principle of instantaneous power flow. The I. INTRODUCTION selection of C DC can be governed by reducing the voltage AC power supply feeds different kind of linear and ripple. non-linear loads in utilities and industrial applications. The The instantaneous current can be written as [4] non-linear loads produce harmonics. The harmonic and is (t ) = iL (t ) − ic (t ) (1) reactive power cause poor power factor and distort the Source voltage is given by supply voltage at the common coupling point or customer vs (t ) = Vm sin ωt ( 2) service point [1-3]. Passive L-C filters are used to compensate the lagging power factor of the reactive load, If a nonlinear load is applied, then the load current will but there are drawbacks such as resonance, large size, have a fundamental component and harmonic components, weight, etc., the alternative solution, are an active power which can be represented as ∞ line conditioner (APLC) that provides an effective solution for harmonics elimination and reactive power iL (t ) = ∑I n =1 n sin( nωt + Φ n ) compensation. The controller is the most important part of the APLC and currently lot of research is being conducted ⎛ ∞ ⎞ in this area. PI and PID controllers have been used to = I1 sin(ωt + Φ1 ) + ⎜ ⎜ ∑ I n sin( nωt + Φ n ) ⎟ ⎟ (3) extract the fundamental component of the load current(s) ⎝ n=2 ⎠ and simultaneously control dc capacitor voltage of the The instantaneous load power can be given as shunt APLC [1-2]. Recently, fuzzy logic controllers (FLC) p L (t ) = is (t ) * vs (t ) are used in power electronic system [3-5] as it can handle = Vm sin 2 ωt * cos φ1 + Vm I1 sin ωt * cos ωt * sin φ1 nonlinearity, and it is more robust than conventional nonlinear controllers. ⎛ ∞ ⎞ This paper explores the potential and feasibility of PI, + Vm sin ωt * ⎜ ⎜∑ I n sin(nωt + Φ n ) ⎟ ⎟ PID and FLC schemes that are suitable for extracting the ⎝ n=2 ⎠ fundamental component of the load current(s) and = p f (t ) + pr (t ) + p h (t ) (4) simultaneously controlling dc capacitor voltage of the From the equation the real (fundamental) power drawn by shunt APLC. The performance of APLC with different the load is controllers are evaluated through computer simulations 54 © 2010 ACEEE DOI: 01.IJEPE.01.03.134
  • 2. ACEEE Int. J. on Electrical and Power Engineering, Vol. 01, No. 03, Dec 2010 3-Phase Source isa,isb, isc Non-Linear Load A ILa,iLb, iLc A B RL B C C LL Ica,icb, icc vsa,vsb, vsc Rs,Ls Rc,Lc Active Power Filter A B VDC C G PWM-VSI inverter g1 g2 g3 g4 g5 g6 Active Power Controller isa* Proportional Integral Hysteresis Current isb* Reference current (Or) VDC Controller Generator Proportional-Integral Derivative isc* (Or) Fuzzy Logic Controller VDC ref isc isb isa vsc vsb vsa Fig 1 Block diagram of the Proposed APLC based on Fuzzy logic controller or Proportional-Integral controller p f (t ) = Vm I1 sin 2 ωt * cos φ1 = vs (t ) * is (t ) (5) PID-Controller From this equation the source current supplied by the PI-Controller source, after compensation is Gain p f (t ) Vdc,ref is (t ) = = I1 cosφ1 sin ωt = I sm sin ωt (6) vs (t ) Integrator Gain Saturation where, I sm = I1 cos φ1 (7) Derivative Gain Vdc The total peak current supplied by the source is LPF isa* I sp = I sm + I sl (8) Vs Gain X If the active filter provides the total reactive and harmonic isb* power, then is(t) will be in phase with the utility voltage Vs Gain X and purely sinusoidal. At this time, the active filter must isc* provide the following compensation current: Vs X Gain ic (t ) = iL (t ) − is (t ) (9) The desired source currents, after compensation, can be Fig 2 PI and PID- controller for reference current generator given Its transfer function can be represented as isa * = I sp sin ωt (10) K isb * = I sp sin(ωt − 1200 ) (11) H ( s) = K P + I (13) s isc * = I sp sin(ωt + 1200 ) (12) where, K P is the proportional constant that determines the dynamic response of the DC-bus voltage control and K I is Where I sp = I sm + I sl is the amplitude of the desired the integration constant that determines it’s settling time. PI source current. controller to eliminate the steady state error in dc voltage. A. Proportional Integral (PI) Controller: The proportional gain [ K P =0.3] and integral gain [ K I =9] Figure 2 shows the block diagram of the proposed PI are set such way that Vdc across capacitor is nearly equal to control scheme of an APLC. The DC side capacitor voltage the reference value of Vdc . is sensed and then compared with a reference value. The obtained error e = Vdc ,ref − Vdc at the nth sampling instant is B. Proportional Integral Derivative (PID) Controller: used as input for PI controller. PI controller used to control The PID controller works on the principle of the PI the DC-bus voltage. controller(refer fig 2), its control gain is a linear combination of the error itself representing the present, the integral of the error representing the past and the derivative of the error representing the future/trend. 55 © 2010 ACEEE DOI: 01.IJEPE.01.03.134
  • 3. ACEEE Int. J. on Electrical and Power Engineering, Vol. 01, No. 03, Dec 2010 KI D. Hysteresis Band Current Control: H ( s) = K P + + K D ( s) (14) s emax +Vdc/2 The controller is tuned with proper gain parameters iactual(t) vout e (t) L [ K P =0.7, K I =23, K D =0.01]. iout C. Fuzzy Logic Controller (FLC): Fuzzy logic control is derived from fuzzy set theory, emin -Vdc/2 iref (t) the transition between membership and non-membership can be gradual. Therefore, boundaries of fuzzy sets can be vague and ambiguous, making it useful for approximate Fig 4 Block diagram of hysteresis current controller systems [4-5]. In fig.1 shows the APLC compensation system with fuzzy control scheme. In order to implement A hysteresis current controller (Fig. 4) is implemented the control algorithm of a shunt active power line to control the switches in the inverter [6-8] to control the conditioner in a closed loop, the dc capacitor voltage current within the inverter. VDC is sensed and then compared with the reference III. SIMULATION RESULT AND ANALYSIS value VDC , ref . The results of the proposed PI, PID and fuzzy logic controlled shunt APLC is investigated using SIMULINK/ Rule Base MATLAB. The system parameters values are; source voltage (Vs) is 230 Vrms, System frequency (f) is 50 Hz, e(n) Source impedance of RS, LS is 1 Ω; 0.1mH respectively, Vdc,ref Rule Evaluator Filter impedance of Rc, Lc is 1 Ω; 2.7 mH, Load impedance + Fuzzification (Decision Defuzzification of RL, LL of diode rectifier RL load in Steady state: 20 Ω; - making) ce(n) 200 mH and Transient: 10 Ω; 100 mH respectively, DC Vdc link capacitance (CDC) is 1600 μF, Reference Voltage (VDC) is 400 V and Power devices used are IGBT/Diode. Data Base Case 1: Proportional Integral controller: Fig 3 Fuzzy logic controller PI-controlled APLC system comprises of a three-phase Table 1 Rule base table source, a nonlinear load (six pulse diode rectifier bridge feeding an RL load) and a PWM voltage source inverter ce(n) NB NM NS ZE PS PM PB e(n) with a dc capacitor input. The simulation time T=0 to T=0.5s with diode rectifier and R L load parameter values NB NB NB NB NB NM NS ZE of 20 ohms and 200 mH respectively. The source current NM NB NB NB NM NS ZE PS after compensation is presented in fig. 5 (a) that indicates NS NB NB MN NS ZE PS PM the current becomes sinusoidal. The load current is shown ZE NB NM NS ZE PS PM PB in (b) for a particular phase (phase a). The actual reference PS NM NS ZE PS PM PB PB currents for phase (a) are shown in fig. 5(c). This wave is obtained from our proposed PI controller. The APLC PM NS ZE PS PM PB PB PB supplies the compensating current that is shown in Fig. PB ZE PS PM PB PB PB PB 5(d). The current after compensation is as shown in (a) which would have taken a shape as shown in (b) without In case of a fuzzy logic control scheme, the error ( ) e = VDC , ref − VDC and integration of error signal APLC. It is clearly visible that this waveform is sinusoidal with some high frequency ripples. We have additionally (∫ e) are used as inputs for fuzzy processing shown in fig achieved power factor correction as shown in Fig. 5(e), phase (a) voltage and current are in phase. The time 3. The output of the fuzzy controller after a limit is domain response of the PI controller is shown in Fig. 5(f) considered as the magnitude of peak reference current I max . that clearly indicates the controller output settles after a few cycles. The switching signals for the PWM inverter are obtained 100 Isa by comparing the actual source currents (isa , isb , isc ) with 80 60 40 (a) 20 0 -20 (isa *, isb *, isc *) in -40 -60 -80 the reference current templates the 0 0.05 0.1 0.15 0.2 0.25 0.3 0.35 0.4 0.45 0.5 50 iLa 40 30 (b) 20 hysteresis current controller. The output pulses are then 10 0 -10 -20 given to the switching devices of the PWM converter.The -30 -40 -50 0 0.05 0.1 0.15 0.2 0.25 0.3 0.35 0.4 0.45 0.5 rules used in this paper are shown in table 1. 80 Isaref 60 40 (c) 20 -20 0 -40 -60 -80 0 0.05 0.1 0.15 0.2 0.25 0.3 0.35 0.4 0.45 0.5 56 © 2010 ACEEE DOI: 01.IJEPE.01.03.134
  • 4. ACEEE Int. J. on Electrical and Power Engineering, Vol. 01, No. 03, Dec 2010 The real and reactive power measured using PID 80 Ica 60 40 20 (d) -20 -40 -60 0 controller, shown in fig 9. 9000 -80 0 0.05 0.1 0.15 0.2 0.25 0.3 0.35 0.4 0.45 0.5 8000 7000 200 Isa 6000 Real Power Vsa 150 Reactive Power 5000 100 (e) 50 4000 0 3000 -50 2000 -100 1000 -150 0 -200 0 0.05 0.1 0.15 0.2 0.25 0.3 0.35 0.4 0.45 0.5 -1000 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1   Fig 9 Active and Reactive power at diode rectifier RL load under the 700 Vdc 600 500 (f) 400 300 200 100 steady state condition (P=7.34 KW, Q=0.034 KW) 0 -100 Total Harmonic distortion measurement (THD) of the 0 0.05 0.1 0.15 0.2 0.25 0.3 0.35 0.4 0.45 0.5 Fig.5 Simulation results for PI-controlled three-phase APLC under the APLC in the transient condition by proportional-integral steady state condition (a) Source current after APLC, (b) Load currents, (c)Reference currents by the Proportional-integral algorithm, (d) derivative controller, shown in fig 10. Compensation current by APLC, (e) source voltage per current for unity 20 Mg it d b s do " a eP a "-P r mt r aa ee 18 16 power factor and (f) DC capacitor voltage 14 a nu e a e n Bs e k (a) 12 10 8 The active power P and reactive power Q associated 6 4 2 with a periodic voltage-current pair that can contain 0 0 2 4 6 8 10 12 14 16 18 Order of Harmonic 30 harmonics. P and Q are calculated by averaging the Mg it d b s do " a e e k -Pr mt r a nu e a e n Bs Pa " aa e e 25 20 voltage-current product with a running average window (b) 15 10 over one cycle of the fundamental frequency (refer fig 6). 5 0 0 2 4 6 8 10 Order of Harmonic 12 14 16 18 t 1 ∫ V (ωt ) × I (ωt )dt Fig 10 PID-controlled under the Transient condition (a) FFT analys of P= (15) Source current without APLC(THD=24.96%) (b) with T t −T APLC(THD=2.96%). t 1 Q= T ∫ v(ωt ) × i(ωt − π / 2)dt (16) Case 3: Fuzzy logic controller: t −T Simulation time T=0 to T=0.5s with load of rectifier with RL parameter values of 20 ohms and 200mH 9000 8000 7000 6000 Real Power 5000 Reactive Power respectively in the steady state and the load with R L value 4000 3000 2000 1000 of 10 ohms and 100 mH under transient condition. The 0 -1000 0 0.1 0 .2 0.3 0 .4 0.5 0 .6 0.7 0 .8 0.9 1 Fig 6 Active and Reactive power at diode rectifier RL load under the simulated waveforms are presented in figures 11, 12 and steady state condition (P=7.34 KW, Q=0.04 KW) 13. 100 Isa 80 Total Harmonic distortion (THD) is measured of the 60 40 (a) 20 0 APLC in the PI controller, shown in fig 7. -20 -40 -60 -80 0 0.05 0.1 0.15 0.2 0.25 0.3 0.35 0.4 0.45 0.5 16 M iu b eo"a Pk- amr a e a t d a dn s e " P e r t 50 14 iLa 40 12 30 Be a 10 20 (a) 10 8 (b) 0 g e s 6 -10 4 -20 n -30 2 -40 0 0 2 4 6 8 10 12 14 16 18 -50 0 0.05 0.1 0.15 0.2 0.25 0.3 0.35 0.4 0.45 0.5 Order of Harmonic 30 80 a e e a - r tr M iu be n a Pk P m a td ad " s e" a e Ica 25 60 20 (b) 40 g e s oB 15 20 10 (c) 0 n 5 0 -20 0 2 4 6 8 10 12 14 16 18 Order of Harmonic -40 -60 Fig 7 PI-controlled under the steady state (a) FFT analys of Source current -80 0 0.05 0.1 0.15 0.2 0.25 0.3 0.35 0.4 0.45 0.5 600 without APLC (THD=25.58%) (b) with APLC(THD=1.98%). Vdc 500 400 300 (d) 200 Case 2: Proportional Integral Derivative controller: 100 -100 0 0 0.05 0.1 0.15 0.2 0.25 0.3 0.35 0.4 0.45 0.5 ID controlled simulation waveforms are verified Fig.11 Simulation results for Fuzzy Logic Controlled 3-phase APLC similarly PI-controller, PID controller waveform presented under the steady state condition (a) Source current after APLC, (b) Load in figures 8, 9 and 10. currents, (c) Compensation current by APLC, and (d) DC capacitor voltage 100 Isa 80 60 40 (a) The summarized DC voltage settling time compared 20 0 -20 -40 PI, PID and Fuzzy logic controller, shown in table 2 -60 -80 -100 0 1000 2000 3000 4000 5000 6000 7000 8000 9000 10000 50 iLa 40 30 20 Table 2 comparison of PI, PID and FLC for DC voltage settling time 10 (b) 0 -1 0 -2 0 -3 0 -4 0 -5 0 0 1000 2000 3000 4000 5000 6000 7000 8000 9000 10000 80 Ica Diode VDC settling time in seconds 60 40 (c) 20 rectifier 0 -20 -40 PI PID Fuzzy logic RL load -60 -80 0 1000 2000 3000 4000 5000 6000 7000 8000 9000 10000 700 vdc controller controller controller 600 500 (d) 400 300 200 Steady State 0.37s 0.26s 0.22s 100 0 -100 0 1000 2000 3000 4000 5000 6000 7000 8000 9000 10000 Fig.8 Simulation results for PID controlled 3-phase APLC under the Transient 0.39s 0.28s 0.23s steady state condition (a) Source current after APLC, (b) Load currents, (c) Compensation current by APLC, and (d) DC capacitor voltage The real and reactive power measured using fuzzy logic controller, shown in fig 12. 57 © 2010 ACEEE DOI: 01.IJEPE.01.03.134
  • 5. ACEEE Int. J. on Electrical and Power Engineering, Vol. 01, No. 03, Dec 2010 9000 8000 7000 CONCLUSIONS 6000 Real Power PI, PID and fuzzy logic controllers are implemented for 5000 Reactive Power 4000 3000 three phase shunt active power line conditioner to obtain dc 2000 1000 0 capacitor voltage and the reference currents. This facilitates -1000 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 Fig 12 Active and Reactive power at diode rectifier RL load under the to improve the power quality parameters such as reactive steady state condition (P=7.33 KW, Q=0.04 KW) power and harmonic compensation due to nonlinear load. The summarized Real (P) and Reactive (Q) power The performance of a PI, PID and fuzzy logic controlled calculation compared with PI, PID and Fuzzy logic APLC is verified and compared under steady state and controller, shown in table 3. transient in various disciplines. The fuzzy logic controller reduces ripples in the dc capacitor voltage and needs less Table 3 comparison of PI, PID and FLC for Real and Reactive power settling time compared to PI and PID-controller. The THD Controller Condition Real (P) and Reactive (Q) power of the source current after compensation is less than 5% in measurement case of all the controllers, the harmonic limit imposed by Without APLC With APLC the IEEE-519 standard. Apparently it seems that the fuzzy PI Steady state P=3.90 KW P=7.34 KW Q=0.12 KW Q=0.04 KW logic controller is an effective candidate for active power Transient P=4.85 KW P=7.34 KW line conditioner to solve power quality issues as this would Q=0.16 KW Q=0.07 KW also facilitate easy implementation. PID Steady state P=3.90 KW P=7.34 KW Q=0.12 KW Q=0.03 KW ACKNOWLEDGEMENTS Transient P=4.85 KW P=7.34 KW Q=0.16 KW Q=0.07 KW The authors would like to acknowledge to Ministry of Fuzzy logic Steady state P=3.91 KW P=7.33 KW Q=0.13 KW Q=0.04 KW Communication and Information Technology, Govt. of Transient P=4.83 KW P=7.35 KW India for the financial support. Q=0.17 KW Q=0.08 KW REFERENCES Total Harmonic distortion measurement of the APLC in the fuzzy logic controller, shown in fig 13. [1] Bimal Abdelmadjid Chaoui, Jean Paul Gaubert, Fateh Krim, 30 Gerard Champenois “PI Controlled Three-phase Shunt aa e r M g itu eb s do " a eP a " -P r m te Active Power Filter for Power Quality Improvement”- 25 (a) an d ae n Bs ek 20 15 Electric Power Components and Systems, 35:1331–1344, 2007 10 5 0 0 2 4 6 8 10 Order of Harmonic 12 14 16 18 [2] Yu Chen and Bo Fu Qionglin Li “Fuzzy Logic Based Auto- 30 modulation of Parameters PI Control for Active Power aa e r M g itu eb s do " a eP a " - P r m te Filter”- World Congress on Intelligent Control and 25 a n d ae n Bs e k 20 (b) 15 Automation June 25 - 27, 2008 [3] S. Saad, L. Zellouma “Fuzzy logic controller for three-level 10 5 0 0 2 4 6 8 10 Order of Harmonic 12 14 16 18 shunt active filter compensating harmonics and reactive power” Electric Power Systems Research, Elsevier, page no Fig 13 Fuzzy logic controlled FFT analys of Source current with APLC 1337–1341 May-2009 under the (a) steady state (THD=1.98%) (b) transient (THD=2.98%) [4] S.K. Jain, P. Agrawal and H.O. Gupta “Fuzzy logic The summarized Total harmonic distortion (THD) controlled shunt active power filter for power quality compared PI, PID and Fuzzy logic controllers, under steady improvement”-IEE proc.electr.power.appl,Vol 149, No.5, Sept-2002 state and transient conditions, shown in table 4. [5] V. S. C. Raviraj and P. C. Sen “Comparative Study of Table 4 THD comparison of PI, PID and FLC Techniques Proportional–Integral, Sliding Mode, and Fuzzy Logic Controllers for Power Converters” IEEE Tran Industry Vol Diode Source Source Current(IS) with APLC 33, No. 2, March/Appl-1997. rectifier Current(IS) [6] K. K. Mahapatra, Arindam Ghosh and S.R.Doradla PI PID Fuzzy logic RL load without APLC “Simplified model for control design of STATCOM using Steady State 25.258% 1.98% 1.82% 1.98% Three-Level Inverter”- IEEE Conference vol. 2, pp. 536-539- 1998 Transient 24.96% 2.96% 2.96% 2.98% [7] Brod D.M, Novotny D.M “Current control of VSI-PWM Inverter”-IEEE Trans on Industry Appl, Vol.21, pp.562-570- The obtained result shows small variation in steady state July/Aug. 1985. [8] Malesani, L., L. Rosetto, G. Spiazzi and A. Zucatto “An ac and transient conditions. FFT analysis of the active filter power supply with sliding mode control”-IEEE Industry brings the THD of the source current into compliance with Appl Magazine Vol.2, page(s): 32-38 Sep/Oct 1996 IEEE-519 standards. 58 © 2010 ACEEE DOI: 01.IJEPE.01.03.134