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Hanbat
Hanbat
National
National
University
University
4-Bit Adder-Subtractor4-Bit Adder-Subtractor
Gookyi Dennis A. N.Gookyi Dennis A. N.
SoC Design Lab.SoC Design Lab.
June.19.2014
ContentsContents
 Implementation of Half-Adder
 Implementation of Full-Adder
 Implementation of 4-Bit Adder-Subtractor
2
Implementation of Half AdderImplementation of Half Adder
 Truth table
 Circuit diagram
3
input1 input2 sum Carry
0 0 0 0
0 1 1 0
1 0 1 0
1 1 0 1
Implementation of Half AdderImplementation of Half Adder
 Half-Adder module
4
Implementation of Half AdderImplementation of Half Adder
 Half-Adder RTL schematic
5
Implementation of Full AdderImplementation of Full Adder
 Truth table
6
input1 input2 Carry_in sum Carry_out
0 0 0 0 0
0 0 1 1 0
0 1 0 1 0
0 1 1 0 1
1 0 0 1 0
1 0 1 0 1
1 1 0 0 1
1 1 1 1 1
Implementation of Full AdderImplementation of Full Adder
 Circuit diagram
7
Implementation of Full AdderImplementation of Full Adder
 Full-Adder module
8
Implementation of Full AdderImplementation of Full Adder
 Full-Adder RTL schematic
9
Implementation of 4-Bit Adder-SubImplementation of 4-Bit Adder-Sub
 Block diagram
10
Implementation of 4-Bit Adder-SubImplementation of 4-Bit Adder-Sub
 Flow chart
11
START
PERFORM
SUBTRACTIO
N
PERFORM
ADDITION
CARRY_IN == 1? YESNO
Implementation of 4-Bit Adder-SubImplementation of 4-Bit Adder-Sub
 4-Bit Adder-Sub module
12
Implementation of 4-Bit Adder-SubImplementation of 4-Bit Adder-Sub
 4-Bit Adder-Sub testbench
13
Implementation of 4-Bit Adder-SubImplementation of 4-Bit Adder-Sub
 4-Bit Adder-Sub waveform
14
Implementation of 4-Bit Adder-SubImplementation of 4-Bit Adder-Sub
 4-Bit Adder-Sub RTL schematic
15

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